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AS4C128M8D3LB-12BIN

Name: Alliance Memory AS4C128M8D3LB-12BIN
Brand: Alliance Memory
SKU: 913-A4C1288D3LB12BIN
Price: 152.26 RMB
Availability: OutOfStock

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请参阅产品规格

Mouser编号：

913-A4C1288D3LB12BIN

制造商编号：

AS4C128M8D3LB-12BIN

制造商：

Alliance Memory

说明：

动态随机存取存储器 DDR3, 1G, 128M x 8, 1.35V, 78-ball BGA, 800MHz, (B-die) Industrial Temp - Tray

数据表:

AS4C128M8D3LB-12BIN 数据表 (PDF)

ECAD模型:

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了解Alliance Memory AS4C128M8D3LB-12BIN详情

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产品属性	属性值	选择属性
制造商:	Alliance Memory
产品种类:	动态随机存取存储器
RoHS:
类型:	SDRAM - DDR3L
存储容量:	1 Gbit
数据总线宽度:	8 bit
最大时钟频率:	800 MHz
封装 / 箱体:	FBGA-78
组织:	128 M x 8
访问时间:	225 ps
电源电压-最小:	1.283 V
电源电压-最大:	1.45 V
最小工作温度:	- 40 C
最大工作温度:	+ 95 C
系列:	AS4C128M8D3LB
封装:	Tray
商标:	Alliance Memory
湿度敏感性:	Yes
安装风格:	SMD/SMT
产品类型:	DRAM
工厂包装数量:	242
子类别:	Memory & Data Storage
电源电流—最大值:	72 mA

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数据表

AS4C128M8D3LB-12BIN 数据表 (PDF)

REACH Declaration (PDF)

合规代码

CAHTS:: 8542320020
USHTS:: 8542320032
MXHTS:: 8542320201
ECCN:: EAR99

原产地分类

原产国:: 中国台湾
组装原产国/地区:: 中国台湾
扩散国家:: 中国台湾

发货时，国家/地区可能会发生变化。

DDR3/DDR3L Synchronous DRAM

Alliance Memory DDR3/DDR3L Synchronous DRAM (SDRAM) achieves high-speed double-data-rate transfer rates of up to 1600Mb/sec/pin for general applications. The chip is designed to comply with all key DDR3/DDR3L DRAM key features, and all of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK# falling). All I/Os are synchronized with differential DQS pairs in a source synchronous fashion. These Alliance Memory devices operate with a single 1.35V (-0.067V/+0.1V) (DDR3L) or 1.5V (±0.075V) (DDR3) power supply and are available in BGA packages.

DDR3L SDRAM

Alliance Memory DDR3L SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is an 8n-prefetch architecture with an interface that transfers two data words per clock cycle at the I/O pins. A single read or write operation for the DDR3 SDRAM effectively consists of a single 8n-bit-wide, four-clock-cycle data transfer at the internal DRAM core and eight corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins. Alliance Memory DDR3L SDRAM is available in various package sizes.