Analog Devices Inc. ADP7112 低噪声、CMOS LDO 线性稳压器
亚德诺半导体 ADP7112 低噪音、CMOS 低压差（LDO）线性调节器，在 2.7V 到 20V 的电压范围内运行，输出电流可达 200mA 。ADP7112 由一个先进的专有架构开发而成，具有高电源抑制、低噪音的特点，采用一个 2.2µF 小型陶瓷输出电容器达到出色的线路和负载&瞬态响应。对于 5V 或 5V 以下的固定选项而言，ADP7112 的输出噪声为 11μV rms，并与输出电压无关。ADP7112 适用于调节采用从 20V 到低至 1.2V 供电轨供电的高性能模拟和混合信号电路。亚德诺半导体 ADP7112 CMOS LDO 线性稳压器采用 6 引脚 1mm × 1.2mm WLCSP 封装，非常适用于噪音敏感应用、模数转换器、数模转换器电路、精密放大器、 VCO VTUNE 控制电源、 通信&和基础设施、医疗&和保健、工业&与仪器仪表领域进行稳压。
The ADP7112 is ideal for the regulation of high-performance analog and mixed-signal circuits operating from 20V down to 1.2V rails. Available in a 6-ball 1mm × 1.2mm WLCSP package, the Analog Devices ADP7112 CMOS LDO linear regulators are well-suited for regulation to noise-sensitive applications, ADC, DAC circuits, precision amplifiers, power for VCO VTUNE control, communications & infrastructure, medical & healthcare, and industrial & instrumentation.
特性
- Low noise: 11µVrms independent of fixed output voltage
- PSRR of 88dB at 10kHz, 68dB at 100kHz, 50dB at 1MHz, VOUT≤5V, VIN = 7V
- Input voltage range: 2.7V to 20V
- Maximum output current: 200mA
- Initial accuracy: ±0.8%
- Accuracy over line, load, and temperature ±1.8%, TJ = −40°C to +125°C
- Low dropout voltage: 200mV (typical) at a 200mA load, VOUT = 5V
- User programmable soft start
- Low quiescent current, IGND = 50μA (typical) with no load
- Low shutdown current
- 1.8μA at VIN = 5V
- 3.0μA at VIN = 20V
- Stable with a small 2.2μF ceramic output capacitor
- Fixed output voltage options: 1.8V, 2.5V, 3.3V, and 5.0V
- 15 standard voltages between 1.2V and 5.0V are available
- Adjustable output from 1.2V to VIN - VDO, the output can be adjusted above an initial set point
- Precision enable
- 1mm × 1.2mm, 6-ball WLCSP
应用
- Regulation to noise-sensitive applications
- ADC, DAC circuits, precision amplifiers, power for VCO VTUNE control
- Communications and infrastructure
- Medical and healthcare
- Industrial and instrumentation
Typical Application Circuits
发布日期: 2015-05-07
| 更新日期: 2022-03-11