MR0A16ACMA35

Everspin Technologies
936-MR0A16ACMA35
MR0A16ACMA35

制造商:

说明:
磁阻随机存取存储器 (MRAM) 1Mb 3.3V 64Kx16 35ns Parallel 磁阻随机存取存储器 (MRAM)

ECAD模型:
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库存量: 1,038

库存:
1,038 可立即发货
生产周期:
27 周 大于所示数量的预计工厂生产时间。
数量大于1038的订购须受最低订购要求的限制。
最少: 1   倍数: 1
单价:
¥-.--
总价:
¥-.--
预估关税:

定价 (含13% 增值税)

数量 单价
总价
¥156.4937 ¥156.49
¥145.0807 ¥1,450.81
¥140.5381 ¥3,513.45
¥137.0577 ¥6,852.89
¥133.6677 ¥13,366.77
¥116.7177 ¥29,179.43
¥116.6273 ¥40,586.30

产品属性 属性值 选择属性
Everspin Technologies
产品种类: 磁阻随机存取存储器 (MRAM)
RoHS:  
REACH - SVHC:
BGA-48
Parallel
1 Mbit
64 k x 16
16 bit
35 ns
3 V
3.6 V
55 mA, 105 mA
- 40 C
+ 85 C
MR0A16A
Tray
商标: Everspin Technologies
湿度敏感性: Yes
安装风格: SMD/SMT
Pd-功率耗散: 600 mW
产品类型: MRAM
工厂包装数量: 348
子类别: Memory & Data Storage
商标名: Parallel I/O (x16)
单位重量: 5.465 g
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已选择的属性: 0

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CNHTS:
8542329000
CAHTS:
8542320090
USHTS:
8542320071
JPHTS:
8542320312
KRHTS:
8542321040
MXHTS:
8542320299
ECCN:
EAR99

Magnetoresistive Random Access Memory (MRAM)

Everspin Technologies Magnetoresistive Random Access Memory (MRAM) delivers significantly long data retention of >20 years and unlimited endurance. The data is automatically protected on power loss by low-voltage inhibit circuitry to prevent writes with voltage out of specification. These MRAM devices feature a 1 transistor – 1 magnetic tunnel junction (1T-1MTJ) architecture. Everspin MRAM products consist of serial SPI MRAMs and parallel interface MRAMs. The serial SPI MRAMs offer ideal memory for applications that must store and retrieve data and programs quickly using a minimum number of pins. The parallel interface MRAMs are SRAM compatible with 35ns/45ns access timing and unlimited endurance.

MR0A08B, MR0D08B, & MR0A16A 1Mb Parallel MRAM

Everspin Technologies MR0A08B, MR0D08B, and MR0A16A are 1,048,576-bit magnetoresistive random access memory (MRAM) devices. The Everspin MRAM devices are available in a variety of specifications, such as dual supply, serial SPI, and organized as 131,072 words of 8 bits or 65,536 words of 16 bits. These MRAM devices are as fast 35ns or 45ns read/write timing cycles with no write delays and unlimited read/write endurance.