Altera Arria® II GX和GZ 中端 FPGA
与竞争器件相比，Altera Arria® II GX和GZ 低功耗 6G 收发器 FPGA 切实 降低了成本和功耗， 为基于6G收发器的应用提供更强的功能。 40-nm Arria II系列含有成本最低的6.375-Gbps 收发器FPGA，静态功耗比竞争产品低50% 。Arria II GX FPGA 有16个 6.375Gbps 收发器，LVDS 为 1.25Gbps，支持 400MHz DD3。Arria II GZ FPGA 有24个 6.375Gbps 收发器， 与 Arria II GX FPGA 相比，密度更大，存储器更多， 数字信号处理(DSP)能力更强。
特性
- 40-nm, low-power FPGA engine
- High-performance digital signal processing (DSP) blocks up to 550MHz
- Configurable as 9 x 9-bit, 12 x 12-bit, 18 x 18-bit, and 36 x 36-bit full-precision multipliers as well as 18 x 36-bit high-precision multiplier
- Maximum system bandwidth
- Up to 24 full-duplex clock data recovery (CDR)-based transceivers supporting rates between 600 Mbps and 6.375Gbps
- Dedicated circuitry to support physical layer functionality for popular serial protocols
- Complete PIPE protocol solution with an embedded hard IP block that provides physical interface and media access control (PHY/MAC) layer, Data Link layer, and Transaction layer functionality
- Optimized for high-bandwidth system interfaces
- Low power
- Architectural power reduction techniques
- Typical physical medium attachment (PMA) power consumption of 100mW at 3.125Gbps.
- Advanced usability and security features
- Parallel and serial configuration options
- 256-bit advanced encryption standard (AES) programming file encryption for design security with volatile and non-volatile key storage options
- Low cost, easy-to-use development kits featuring high-speed mezzanine connectors (HSMC)
- Emulated LVDS output support with a data rate of up to 1152Mbps
应用
- Wireless
- Wireline
- Broadcast
- Military
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Altera Enpirion®电源解决方案
高频、高效电源管理器件，用于FPGA、SoC、 CPU、ASIC。
Altera Arria® 系列 FPGA
设计用于对成本和功耗敏感的收发器以及嵌入式应用。
Design Software
Altera Quartus® II 设计软件
多平台设计 环境，可轻松满足您在 FPGA和CPLD 各设计阶段的所有特定需求。
发布日期: 2012-11-15
| 更新日期: 2026-01-08