特性
- 310ps Propagation delay
- Guaranteed 2.7GHz operating frequency
- 0.3psRMS Random jitter
- <30ps Output-to-output skew
- -2.375V to -5.5V Supplies for differential LVECL/ECL
- +2.375V to +5.5V Supplies for differential LVPECL/PECL
- Outputs low for open inputs
- Dual output buffers
- >2kV ESD protection (human body model)
应用
- High-speed telecom and datacom applications
- Central-office backplane clock distribution
- DSLAM/DLC
Functional Diagram
发布日期: 2014-11-13
| 更新日期: 2025-07-31

