特性
- Dual, simultaneous-sampling, 12-bit successive approximation register (SAR) ADCs
- 2 x 2 Mux inputs or two differential inputs
- 1.25Msps sampling rate per ADC
- Internal or external reference
- Excellent dynamic performance
- 71dB SINAD
- 84dBc/SFDR
- 1MHz full-linear bandwidth
- 4.75V to 5.25V low-power operation
- 280mW (normal operation)
- 2.5µW (full power-down)
- 20MHz, SPI-compatible, 3-wire serial interface user-selectable single (0.625Msps max) or dual outputs (1.25Msps max)
- Input range: ±10V
- Small 20-Pin TQFN package
应用
- Bill validation
- Communications
- Data acquisition
- Motor control
- Portable instruments
Block Diagram
发布日期: 2011-08-15
| 更新日期: 2023-04-13

