STMicroelectronics 基于 ARM® Cortex-M3 的 STM32 F2 系列 MCU
The 意法半导体基于 ARM® Cortex™-M3 的 STM32 F2 系列 MCU 基于 ST 先进的 90 nm NVM 工艺技术,并有创新的自适应实时存储加速器 (ART Accelerator™) 和多层总线矩阵,在价格和性能之间达到前所未有的平衡。 这些基于 ARM® Cortex™-M3 的 STM32 F2 系列 MCU 具有高度集成、1M 字节闪存、高达 128K 字节 SRAM、以太网 MAC、USB 2.0 HS OTG、相机接口、硬件加密支持和外部存储器接口等特征。 意法半导体的加速技术使这些 MCU 达到 120 MHz FCPU 下 150 DMIPS,这相当于零等待状态执行,同时将动态电流消耗保持在超低的 188A/MHz 的水平。特性
- Core
- Arm 32-bit Cortex-M3 CPU (120MHz max) with Adaptive real-time accelerator (ART Accelerator™ allowing 0-wait state execution performance from Flash memory, MPU, 150 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1)
- Memories
- Up to 1Mbyte of Flash memory
- 512bytes of OTP memory
- Up to 128 + 4Kbytes of SRAM
- Flexible static memory controller that supports Compact Flash, SRAM, PSRAM, NOR and NAND memories
- LCD parallel interface, 8080/6800 modes
- Clock, reset, and supply management
- From 1.8 to 3.6V application supply+I/Os
- POR, PDR, PVD and BOR
- 4MHz to 26MHz crystal oscillator
- Internal 16MHz factory-trimmed RC
- 32kHz oscillator for RTC with calibration
- Internal 32kHz RC with calibration
- Low-power modes
- Sleep, Stop and Standby modes
- VBAT supply for RTC, 20 × 32 bit backup registers, and optional 4KB backup SRAM
- Up to 17 timers
- Up to 12 16-bit and two 32-bit timers, up to 120MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
- Up to 140 I/O ports with interrupt capability
- Up to 136 fast I/Os up to 60MHz
- Up to 138 5V-tolerant I/Os
- Up to 15 communication interfaces
- Up to 3 × I2C interfaces (SMBus/PMBus)
- Up to 4 USARTs and 2 UARTs (7.5Mbit/s, ISO 7816 interface, LIN, IrDA, modem ctrl)
- Up to 3 SPIs (30Mbit/s), 2 with muxed I2S to achieve audio class accuracy via audio PLL or external PLL
- 2 × CAN interfaces (2.0B Active)
- SDIO interface
- Advanced connectivity
- USB 2.0 full-speed device/host/OTG controller with on-chip PHY
- USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI
- 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII
- Cryptographic acceleration
- Hardware acceleration for AES 128, 192, 256, Triple DES, HASH (MD5, SHA-1)
- Analog true random number generator
Overview
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发布日期: 2012-02-23
| 更新日期: 2025-01-10
